Description
This
position is in IDGz HIP Design automation team (HIP DA). HIP DA provides design
automation tools, flows and methods for designing world class HIP such as PCIe,
DDR, SATA, LDOs, ..etc. In this role, you will develop and support world class
design automation for automated layout and EDA views generation for IO families
such as CFIOs, LDO family or Serial IOs.
Qualifications
B.S./M.S.
in EE/CS
3+
years design automation experience in developing physical design flow using
SNPS-ICC/Magma-Blast Fusion or Intel Internal tools such as Genesys needed
Solid
understanding of design rules, floorplanning, power grid planning, Clock tree
routing, automated routing methodologies needed
Solid
automation skills in PERL/TCL required
Understanding
of reliability issues such as EM/IR/ESD are highly desirable
Flexibility
of working in different physical design tools is a MUST - ICC/Genesys
Candidate
must have strong communication skills and strong motivation for customer
support
Ability
to multi-task and flexibility to work in global environment needed.
Job
Category: Engineering
Primary
Location: India-India, Bangalore
Full/Part
Time: Full Time
Job
Type: Experienced
Regular/Temporary:
Regular
Posting
Date: Apr 25, 2013
Apply
Before: Jul 1, 2013
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